3. Configuration Description

This sectionDescriptionKernel defconfig、Device Treeand SDK menuconfig inand WiFi（ RTL8189FS SDIO）Relatedof Configuration；Board-levelToolsPackageand STA/AP OperationCommands CV184x RTL8189FS WiFi FlowDescription。

3.1. Kernel Configuration

in Board-levelof defconfig in orConfirmunder Option， KernelSupport WiFi PinDriver、 WirelessModuleand Realtek RTL8189FS（Option and ，withActual Kconfig is ）。

ExamplePath（ Board VariantReplace）：

  • build/boards/cv184x/cv1842hp_wevb_0014a_spinor/linux/cvitek_cv1842hp_wevb_0014a_spinor_defconfig

  • build/boards/cv184x/cv1842hp_wevb_0014a_emmc/linux/cvitek_cv1842hp_wevb_0014a_emmc_defconfig

CONFIG_CVI_WIFI_PIN=y
CONFIG_CP_EXT_WIRELESS=y
CONFIG_WIRELESS=y
CONFIG_WLAN_VENDOR_REALTEK=y
CONFIG_RTL8189FS=m
CONFIG_WLAN=y
CONFIG_CFG80211=y
CONFIG_CFG80211_DEFAULT_PS=y
CONFIG_CFG80211_CRDA_SUPPORT=y

CONFIG_RTL8189FS=m IndicateswithModuleMethodBuild，Generate 8189fs.ko， User space insmod Load（ canThrough SDK Option Installto rootfs， under menuconfig）。

Wi-Fi Interfaceis SDIO，needinBoard-level DTS and asic dtsi in Enable wifisd and wifi_pin Node（ under ）。

3.2. Device tree: wifisd node (SDIO Wi-Fi)

Board-level DTS Board VariantContentsof dts_arm under， alreadyInclude cv184x_base_arm.dtsi、 asic of cv184x_asic dtsi；WiFi SDIO ControllerNodeDefinitionin default dtsi of cv184x_base.dtsi in（Node Name wifisd，reg is wifi-sd@4320000）。PleaseConfirmNode status is okay（Ifalready okay No need toModify）。

SPI NOR Board VariantRefer to（ with SDK Actualis ）：

wifisd:wifi-sd@4320000 {
   compatible = "cvitek,cv184x-sdio";
   bus-width = <4>;
   reg = <0x0 0x4320000 0x0 0x1000>;
   reg_names = "core_mem";
   src-frequency = <375000000>;
   min-frequency = <400000>;
   max-frequency = <50000000>;
   64_addressing;
   reset_tx_rx_phy;
   non-removable;
   pll_index = <0x7>;
   pll_reg = <0x300207C>;
   no-mmc;
   no-sd;
   status = "okay";
};

eMMC Board VariantRefer to（cv1842hp_wevb_0014a_emmc etc.）：

wifisd:wifi-sd@4320000 {
    compatible = "cvitek,cv184x-sdio";
    bus-width = <4>;
    reg = <0x0 0x4320000 0x0 0x1000>;
    reg_names = "core_mem";
    src-frequency = <400000000>;
    min-frequency = <400000>;
    max-frequency = <50000000>;
    64_addressing;
    reset_tx_rx_phy;
    non-removable;
    pll_index = <0x60>;
    pll_reg = <0x300209C>;
    clocks = <&clk CV184X_CLK_SD1>, <&clk CV184X_CLK_AXI4_SD1>;
    clock-names = "clk_wifisd", "clk_axi";
    no-mmc;
    no-sd;
    status = "okay";
};

3.3. Device tree: do not delete the wifi-sd node

Edit build/boards/default/dts/cv184x/cv184x_asic_bga.dtsi or cv184x_asic_qfn.dtsi etc. beforeBoard VariantUseof asic dtsi。If in /delete-node/ wifi-sd@4320000;，PleaseDeleteor ， WiFi SDIO Node 。 for exampleunder：

/* /delete-node/ wifi-sd@4320000; */

/delete-node/ i2c@04010000;
/delete-node/ i2c@04020000;
/delete-node/ ethernet@04520000;
/delete-node/ i2s@04120000;
…

3.4. Configure SDIO

PleaseRefer to《CVITEK DeviceDriverOperation Guide》inandSDIORelated Chapter。SDIO IOVoltageis3.3V，needConfirmWi-FiModuleIOVoltageand SDIOVoltage 。

3.5. Configure Pinmux

IfWi-FiModuleUseofInterfaceisSDIO , needConfigure SDIOof 。CV184XCanThroughinbuild/boards/{chip_name}/{board_name}/u-boot/cvi_board_init.cFileinAddfollowingpinmuxSettings Configure SDIOofpinmux（ cv1843hofevbConfiguration， Configuration PinNeed toView FigureinsoctowifiModuleprocessor_enofPin ）:

int cvi_board_init(void)
{
    …
    //#########WIFI
    pinmux_config(PINMUX_SDIO1);
    PINMUX_CONFIG(JTAG_CPU_TCK, XGPIOA_18);
    …
    return 0;
}

Related Configuration ，PleaseRefer tou-boot-2021.10/board/cvitek/cv184x/board.c

3.6. Configure Wi-Fi GPIO

Wi-FiModuleofprocessor_enPin SOConof GPIO ，is Operation GPIO， ofModule，inwifiDriverinUse ModuleProvideofInterface wifi onunder 。CanThroughDevice Tree wifiUseofgpio： （ inwakeupofFunction Use，Can ；poweronPinandon subsectionSettingsofpinmux ）

wifi_pin {
    compatible = "cvitek,wifi-pin";
    poweron-gpio = <&porta 18 GPIO_ACTIVE_HIGH>;
    wakeup-gpio = <&porte 7 GPIO_ACTIVE_HIGH>;
};

IfBoard-levelin asic dtsi inwith label Node，can as follows （GPIO withActualSchematicis ）：

&wifi_pin {
    compatible = "cvitek,wifi-pin";
    poweron-gpio = <&porte 2 GPIO_ACTIVE_HIGH>;
    wakeup-gpio = <&porte 6 GPIO_ACTIVE_HIGH>;
};

Configuration build/boards/default/dts under Contentsof base dtsi（If cv184x_base.dtsi）orBoard Variant Useof asic dtsi in；cvi_wifi_pin Driverfrom poweron-gpio Read WiFi Moduleon GPIO， Configuration needin dts/dtsi in 。